High-Level VLSI Synthesis

The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de- scriptions started in the early 1970 s, there was no automated path from the register- transfer design produced by high-level synthesis to a complete hardware imple- mentation. As a result, it was very difficult to measure the effectiveness of high- level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Todays more mature CAD techniques help close the gap between an automat- ically synthesized design and a manufacturable design. Market pressures encour- age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple- ment a register-transfer design in silicon, leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; todays leading edge designers using logic synthesis systems are training themselves to be tomorrows consumers of high-level synthe- sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co: n- plexity of the systems being designed, all make higher-level design automaton inevitable.