Optimal Realization of the Rijndael Algorithm on Xilinx Platforms

With the spanning of connectedness in every aspect of life, the desire for secure data exchange is at its prime time. This book aims to present an efficient implementation of the Rijndael encryption algorithm (also know as the Advanced Encryption Standard) on Xilinx FPGA platforms. Initially, we tackle the issue of large look-up tables in the encryption algorithm. Thus, a method for representing the tables in a way that implements efficiently (with low cost, minimal number of stages and high operational speed) is proposed. This involves partitioning the table into four subtables and these tables deliver their contents on two stages. Next, we employ finite fields mathematics to modify the MixColumn operation to be suitable for implementation with basic operations. In addition to that we modify the structure of the algorithm by omitting the operations that the FPGA hardware can execute instantaneously. Similarly we split the operations that are long and slow to facilitate the use of pipline. In this implementation each round of the algorithm is redivided into five stage pipline. The achieved speed is more than 150 MHz with data throughput more than 20Gbps.