Constraint-Based Verification
System Level Design of Reconfigurable Systems-on-Chip
Compiling Esterel
Digital Noise Monitoring of Defect Origin
Asynchronous Pulse Logic
Systematic Design of Analog IP Blocks
Verification by Error Modeling : Using Testing Techniques in Hardware Verification
Synthesis Techniques and Optimizations for Reconfigurable Systems
Ultra Low-Power Electronics and Design
Clock Generators for SOC Processors : Circuits and Architectures
SystemC Kernel Extensions for Heterogeneous System Modeling : A Framework for Multi-MoC Modeling & Simulation
Microsystems Dynamics
